Over a period of twelve years several appliances for electron paramagnetic resonance (EPR) examination of different biological samples have been succesfully designed, made and deployed. Among them are three generations of digital control and acquisition units.
2016 Digital Receiver
A complete system for Saturation Recovery experiment control and data acquisition has been designed and manufactured (RCV-02 Digital Receiver). Also the firmware and software has been prepared to fulfill all the customer needs.
The equipment can control several external devices:
- magnetic filed controller,
- magnetic filed modulation controller,
- microwave bridge,
- other appliances.
The main board comprises of a few fundamental devices:
- two independent analog tracks, each with selected LF/HF paths, low-pass/band-pass filters and AC/DC coupling,
- two fast 400 MSps 14-bit ADC converters for acquisition of wide-band signals from resonator,
- high accuracy PLL-based clocks signals generator and distributor,
- set of auxillary, precision DACs for external equipment control,
- module with Xilinx Zynq 7020 FPGA/ARM device.
The device front panel contains a number of connectors: four BNC sockets (2 analog tracks, LF/HF), ten LEMO connectors (for 8 microwave switches and 2 triggers) and four BNC sockets for auxiliary DACs outputs. On a back panel there are USB and Ethernet connectors, two RS232 sockets and an AC power supply socket. A multi-voltage, low-noise power supply is a substantial part of the design.
Signal acquisition block consists of two identical analog tracks, each ending with a fast, 400 MSps 14-bit ADC converter, with analog band exceeding 2 GHz. Each track has two alternative signal paths for high frequency and low frequency signals. The HF track consists of a band pass filter with a center frequency of 1230 MHz and a symmetrizator (balun). The LF track contains a 120 MHz low-pass filter, a coupling type (AC/DC) switch and a switched gain amplifier (A = 2/20). The signal from one of the paths is selected with a relay and directed to the input of the ADC. Sampled signal is sent to the digital processing unit (FPGA/ARM module).
In the FPGA domain the digital signal is further processed. First it is optionally filtered and decimated. Four sampling speeds are available: 50, 100, 200 and 400 MSps, each with maximum buffer length of 16K samples. Further, the data are accumulated up to 256 times (so called 'phase cycles') for each state of microwave phase invertor (can be toggled automatically). Then, the data are still accumulated up to 256 times (so called 'field cycles') for each state of magnetic field (resonant/non-resonant, also can be toggled automatically). Processed (accumulated) data are further transmitted to the ARM processing domain and to control computer (PC) over the Ethernet interface. FPGA part is also responsible for the generation of digital signals used to control the microwave keys during the sample stimulation phase. For this purpose, a bus of eight universal inputs/outputs is used. To control the phase cycles and field cycles two additional channels of universal I/O are designed.
The device allows for the expansion of its functionality with additional signal connectors, not present on a standard front/rear panel :
- 12 high-speed digital inputs/outputs, balanced
- 4 clock outputs, balanced
- 2 clock inputs, balanced
- 1 clock input, unbalanced
The acquired and pre-processed data are transmitted over Ethernet to the control computer, running LabVIEW software which controlls the whole experiment and presents the data.
2010 Digital Receiver
A digital receiver with pulse sequence generator and control subsystem has been designed and manufactured. The FPGA & DSP firmware and the PC software has been prepared to fulfill all the customer needs. The device serves for saturation recovery experiment as well as for continuous wave (synchronous sampling).
The equipment comprises of a few boards:
- FMC-141 board wih two fast 500 MSps 12-bit ADC converters for acquisition of wide-band signals from resonator,
- FPGA board with Xilinx Virtex-6 FPGA device,
- FMC custom interface board for a DSP engine (two LinkPorts, each for 1.28 Gbps data transmission),
- DSP board with Analog Devices ADSP-21496 signal processor,
- low noise power supply.