Airplane Transponder

Several designs concerning reception and transmission of data packets over 1030/1090 MHz for Secondary Surveillane Radar system have been done. The receivers/transmitters utilize PPM/DPSK modulation/demodulation schems. The Rx sensitivity level achives -85...-90 dBm. Every design includes GPS module for position and (precise) time, so that the received packets can be marked with timestamps with resolution downto 10ns. On different designs some other circuitry may be found, like: GSM/LTE module, RF 1W amplifier, houskeeping ADC, watchdog etc. Few examples are presented below.

Single channel LogAmp receiver

The simple design with Rx channel for 1030 / 1090 MHz, based on Log Detector device. RF path Includes 0/15 dB switchable attenuator for strong signals. The design exploits one of the optional fast 20 / 40 / 80 MSps parallel ADCs. It also integrates a high-time-precision GPS module. There is also a connector to attach an option board or accessories like environmental sensors etc. The design interfaces to a board with Xilinx Zynq 7010/20 FPGA/ARM device.

Single channel quadrature transceiver

The design with Tx and Rx channels for 1030 / 1090 MHz, based on qadrature modulator and demodulator devices. The Rx channel has 0/10/20/30dB switchable attenuator for strong signals. The Tx channel ends with RF switch and 1W power amplifier, allowing to choose the active output signal level (0dBm or +30dBm). The design exploits fast, 80 MSps 2-channel parallel ADC and DAC. It also integrates a high-time-precision GPS module. There are also two connectors to attach accessories like environmental sensors etc. The design interfaces to a board with Xilinx Zynq 7010/20 FPGA/ARM device.

Double channel LogAmp receiver

The design with two Rx channels for 1090 MHz, based on Log Detector device. Each channel has 0/10/20/30dB switchable attenuator for strong signals, and a VideoOut connector for real-time receiver examination with antenna setup (during installation). The design exploits a fast, 100 MSps 2-channel parallel ADC. It also integrates a high-time-precision GPS module, a GSM/LTE module, houskeeping ADC for in-the-field monitoring of temperature and supply voltages and currents, and an external watchdog device. There are also three connectors to attach option boards and accessories like: simple RF keyed transmitter, precise clock source, sensors etc. The design interfaces to a board with Xilinx Zynq 7010/20 FPGA/ARM device.

LogAmp & PhaseComp receiver

The design comprises of four Rx channels for 1090 MHz: one based on Log Detector device, and three with an RF Phase Comparator. The LogAmp channel has 0/10/20/30dB switchable attenuator for strong signals, and VideoOut connectors for real-time receivers examination. The design uses a fast (up to 40 MSps) 4-channel 10-bit serial ADC. Data stream from the receivers totals to 800Mbps. It also integrates a high-time-precision GPS module and a connector to attach optional accessories like environmental sensors etc. The design interfaces to a board with Xilinx Zynq 7010/20 FPGA/ARM device.